Research

We focus on developing analog/RF/mmWave integrated circuits and micro-systems for communications, sensing, and biomedical applications. In these applications, energy efficiency, bandwidth, size, and security are critical performance metrics. Our research aims to extend the boundaries of these metrics and enable exciting new applications at the hardware level, by leveraging innovations in application-specific integrated circuits (ASIC) design, advanced electromagnetics, and their tight integration. Specifically, our work involves (i) conducting theoretical analysis of circuit problems, (ii) developing new hardware capabilities, and (iii) performing system-level engineering.

AI-assisted design automation extends our research philosophy by changing how we develop circuits and systems. We combine circuit knowledge and physical models with machine learning and optimization to connect hardware design specifications to practical circuit schematics and layouts. With the rapid advancement in AI, we aim to make design exploration much more efficient and broaden our understanding of circuits and systems.

Research directions

AI & design automation

A central focus of AI-assisted design automation is learning how circuit design parameters and layouts translate into electrical behavior. MOTIF-RF focuses on multi-template transformer models and inverse design to synthesize impedance-matching networks. FoundaRF extends this effort toward a physics-informed foundation model that transfers across passive topologies and semiconductor technologies. These approaches aim to reduce repeated data collection and expensive EM simulation during design exploration, while retaining modeling accuracy.

At the building block level, we bring active-passive co-optimization into end-to-end, agentic design flows. Our automated oscillator and PA flows use surrogate modeling and inverse design to generate schematics and layouts, with robustness to process variations during synthesis. We are also exploring generative topology synthesis and language-agent workflows. Together, these efforts expand automation from components to building blocks and systems, aiming to generate designs while preserving interpretability and free designers to focus on architectural innovation rather than repetitive parameter tuning.

Poster assembled from original MOTIF-RF, FoundaRF and AdreamDCO paper workflows, alongside the original photographs of two fabricated oscillator prototypes.

Related Publications:

RF, mmWave & sub-THz systems

A significant shift in 5G communications is moving up the carrier frequency to mmWave, leading to a 10× increase in the available bandwidth and resulting data throughput. As 5G deployment continues, one potential 6G under discussion aims to further increase the frequency to 100+ GHz. To truly harness mmWave/sub-THz bands in large-area networks, we need to satisfy three system requirements simultaneously – wide network coverage, high bandwidth, and support for high user mobility. Towards this end, we are interested in energy-efficient, wideband, and reconfigurable transceiver building blocks, antennas, and beamforming systems.

From Circuits to Systems: original ISSCC 2025 FEM and LO generator, three-way Doherty and power-combined Doherty die photos; D-band transmitter, antenna and packaging assembly; and spatial beam-control architecture.

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Neuroengineering

A major technological need to further advance brain science is to develop neural interfaces that can record and stimulate neural activity across a large number of neurons and across all relevant time scales. Emerging brain-machine interfaces built on large-scale neural recording can decipher brain activities; the decoded information can then be used to control neural prosthetics to restore lost sensory or motor functions for paralyzed patients. On the neural stimulation side, deep brain stimulation (DBS) has proven to be highly effective in treating brain disorders (such as Parkinson’s disease) by injecting a pulsed current with a pre-defined pattern. In collaboration with Rice Neuro-engineering Initiative and Texas Medical Center, we are interested in developing new methodologies and hardware interfaces for neural recording and stimulation.

Integrated circuits and systems that connect to biology and healthcare: the Home page neural-system and cortical-recording panels grouped as high-channel-count neural interfaces, alongside the ICP sensor PCB, die photo and measured physiological waveforms.

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Wireless hardware security

While the wide adoption of 5G and IoT has opened up various new applications, their network complexity and inherent resource constraints also bring unprecedented security challenges that require innovative solutions. Wireless physical-layer security has great potential for carrying out low security-level tasks (such as identification) and complementing digital cryptography for more advanced primitives (such as multi-factor authentication). In collaboration with Prof. Kaiyuan Yang’s group, we are interested in developing low-overhead hardware security solutions that can be directly embedded in transceiver frontends to enable physical-layer security protection.

Security built into the wireless hardware: device-identification concept and die photo at left, ASM constellation-scrambling diagram above its hardware in the middle, and Qiang Zhou's JSSC Fig. 3 architecture above frequency-diverse sub-array hardware at right.

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